RegViz: Visualize TSM_OVRD0 Bitfield

Freescale Semiconductor /MKW40Z4 /XCVR /TSM_OVRD0

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Interpret as TSM_OVRD0

PLL_VCO_BUF_TX_EN_OVRD_EN=0, QGEN_REG_EN_OVRD_EN=0, ADC_DIG_REG_EN_OVRD_EN=0, PLL_VCO_REG_EN_OVRD_EN=0, TCA_TX_REG_EN_OVRD_EN=0, PLL_VCO_BUF_RX_EN_OVRD_EN=0, PLL_VCO_EN_OVRD_EN=0, PLL_CYCLE_SLIP_LD_EN_OVRD_EN=0, XTAL_ADC_REF_CLK_EN_OVRD_EN=0, ADC_ANA_REG_EN_OVRD_EN=0, PLL_LDV_EN_OVRD_EN=0, PLL_VCO_AUTOTUNE_EN_OVRD_EN=0, XTAL_PLL_REF_CLK_EN_OVRD_EN=0, PLL_REG_EN_OVRD_EN=0, PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN=0, PLL_PA_BUF_EN_OVRD_EN=0

Description

TSM Override 0

Fields

PLL_REG_EN_OVRD_EN	Override control for PLL_REG_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_REG_EN_OVRD to override the signal “pll_reg_en”.
PLL_REG_EN_OVRD	Override value for PLL_REG_EN
PLL_VCO_REG_EN_OVRD_EN	Override control for PLL_VCO_REG_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_VCO_REG_EN_OVRD to override the signal “pll_vco_reg_en”.
PLL_VCO_REG_EN_OVRD	Override value for PLL_VCO_REG_EN
QGEN_REG_EN_OVRD_EN	Override control for QGEN_REG_EN 0 (0): Normal operation. 1 (1): Use the state of QGEN_REG_EN_OVRD to override the signal “qgen_reg_en”.
QGEN_REG_EN_OVRD	Override value for QGEN_REG_EN
TCA_TX_REG_EN_OVRD_EN	Override control for TCA_TX_REG_EN 0 (0): Normal operation. 1 (1): Use the state of TCA_TX_REG_EN_OVRD to override the signal “tca_tx_reg_en”.
TCA_TX_REG_EN_OVRD	Override value for TCA_TX_REG_EN
ADC_ANA_REG_EN_OVRD_EN	Override control for ADC_ANA_REG_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_ANA_REG_EN_OVRD to override the signal “adc_ana_reg_en”.
ADC_ANA_REG_EN_OVRD	Override value for ADC_ANA_REG_EN
ADC_DIG_REG_EN_OVRD_EN	Override control for ADC_DIG_REG_EN 0 (0): Normal operation. 1 (1): Use the state of ADC_DIG_REG_EN_OVRD to override the signal “adc_dig_reg_en”.
ADC_DIG_REG_EN_OVRD	Override value for ADC_DIG_REG_EN
XTAL_PLL_REF_CLK_EN_OVRD_EN	Override control for XTAL_PLL_REF_CLK_EN 0 (0): Normal operation. 1 (1): Use the state of XTAL_PLL_REF_CLK_EN_OVRD to override the signal “xtal_pll_ref_clk_en”.
XTAL_PLL_REF_CLK_EN_OVRD	Override value for XTAL_PLL_REF_CLK_EN
XTAL_ADC_REF_CLK_EN_OVRD_EN	Override control for XTAL_ADC_REF_CLK_EN 0 (0): Normal operation. 1 (1): Use the state of XTAL_ADC_REF_CLK_EN_OVRD to override the signal “xtal_adc_ref_clk_en”.
XTAL_ADC_REF_CLK_EN_OVRD	Override value for XTAL_ADC_REF_CLK_EN
PLL_VCO_AUTOTUNE_EN_OVRD_EN	Override control for PLL_VCO_AUTOTUNE_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_VCO_AUTOTUNE_EN_OVRD to override the signal “pll_vco_autotune_en”.
PLL_VCO_AUTOTUNE_EN_OVRD	Override value for PLL_VCO_AUTOTUNE_EN
PLL_CYCLE_SLIP_LD_EN_OVRD_EN	Override control for PLL_CYCLE_SLIP_LD_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_CYCLE_SLIP_LD_EN_OVRD to override the signal “pll_cycle_slip_ld_en”.
PLL_CYCLE_SLIP_LD_EN_OVRD	Override value for PLL_CYCLE_SLIP_LD_EN
PLL_VCO_EN_OVRD_EN	Override control for PLL_VCO_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_VCO_EN_OVRD to override the signal “pll_vco_en”.
PLL_VCO_EN_OVRD	Override value for PLL_VCO_EN
PLL_VCO_BUF_RX_EN_OVRD_EN	Override control for PLL_VCO_BUF_RX_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_VCO_BUF_RX_EN_OVRD to override the signal “pll_vco_buf_rx_en”.
PLL_VCO_BUF_RX_EN_OVRD	Override value for PLL_VCO_BUF_RX_EN
PLL_VCO_BUF_TX_EN_OVRD_EN	Override control for PLL_VCO_BUF_TX_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_VCO_BUF_TX_EN_OVRD to override the signal “pll_vco_buf_tx_en”.
PLL_VCO_BUF_TX_EN_OVRD	Override value for PLL_VCO_BUF_TX_EN
PLL_PA_BUF_EN_OVRD_EN	Override control for PLL_PA_BUF_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_PA_BUF_EN_OVRD to override the signal “pll_pa_buf_en”.
PLL_PA_BUF_EN_OVRD	Override value for PLL_PA_BUF_EN
PLL_LDV_EN_OVRD_EN	Override control for PLL_LDV_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_LDV_EN_OVRD to override the signal “pll_ldv_en”.
PLL_LDV_EN_OVRD	Override value for PLL_LDV_EN
PLL_RX_LDV_RIPPLE_MUX_EN_OVRD_EN	Override control for PLL_RX_LDV_RIPPLE_MUX_EN 0 (0): Normal operation. 1 (1): Use the state of PLL_RX_LDV_RIPPLE_MUX_EN_OVRD to override the signal “pll_rx_ldv_ripple_mux_en”.
PLL_RX_LDV_RIPPLE_MUX_EN_OVRD	Override value for PLL_RX_LDV_RIPPLE_MUX_EN

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